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f-alpha.net » Electronics » Digital Electronics » Flip-Flop » Know more... » Experiment 26 - Gated JK Latch

Experiment 26 - The Gated JK Latch

In the circuit diagram shown, you recognize the JK latch, which has been extended by one ENABLE (E) input...

Circuit diagram gated JK latch.

  • For E = 0, the latch is open.
  • For E = 1 the latch closes and the last result is stored.

Circuit gated JK latch. (Enlarge)

However, the "Race Condition" of the JK latch remains. With J = K = 1 and E = 0, the circuit oscillates. Therefore, you can not predict the outcome of Q and Q with E = 1.

You need a circuit in which the latch switches precisely once at a certain point.

For this you use a so-called master-slave circuit...

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