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f-alpha.net » Electronics » Digital Electronics » Flip-Flop » Let's go... » Experiment 8 - Master-Slave

Experiment 8 - Master-Slave

When you apply the clock signal to the E input of a flip-flop, you surely have noticed one thing. The time the signal is 1, is relatively long. It can indeed happen, that the open flip-flop changes state several times within one clock cycle.

Clock Signal.

It would be advantageous if the flip-flop changes its state only at an edge, when the clock signal switches from 0 to 1 or vice versa.

Below a master-slave circuits is shown. It results in an edge-triggered flip-flop with the inputs D and Clk (for CLOCK). This new flip-flop changes state only at a rising edge.

Master-Slave Circuit for an edge-triggered Flip-Flop.

 

Note...

As soon as a latch is edge-triggered, the circuits are called flip-flops.

From now on all experiments are around flip-flops.

An explanation of how exactly a master-slave circuit works, goes too far at this point. However, you can also build other master-slave circuits resulting in an edge-triggered flip-flop switching on falling edges.

Now it is time to experiment with edge-triggered flip-flops.

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