Take a look at the circuit diagram. Now you have four flip-flops in the chain, with the output Q of the forward flip-flops directly connected to the D input of the following flip-fops. In addition, all flip-flops are connected directly to the clock signal (Clk) and switch synchronously.
At each clock signal (Clk), the stored values are "pushed" to a flip-flop to the right.
In this case, a new value is stored in Q3, while the last value (Q0) is "pushed" out of the shift register.
You can extend this chain almost indefinitely. In fact, shift registers of several thousand flip-flops were used in mainframe computers in the 1970s.
In the next experiment you take a look at the, for shift register, important RESET input...