Experiment 5 - The 2-bit Ripple-Carry Adder

An adder, where the carry bit is passed from one digit to the next, is called a ripple-carry adder. Thus you can easily build adders of large numbers.

However, a ripple-carry adder is slow when it has to add up large numbers. Why...? Consider again the circuit diagram of the 2-bit adder...

Illustration delay of a 2-bit ripple-carry adder.

No logic gate can provide immediate results. Only after a delay, the so-called gate delay time τ, the gate has executed the logic computation.

With the circuit diagram in mind, you can easily make the following statements...

Gate Delay

Information about the gate delay times can be found in the data sheets of the CMOS components. They are often indicated as "Propagation Delay Time".

Typical gate delay times are τ = 60 ns.