Consider the circuit shown. It is the same circuit as in Experiment 6, only this time it is constructed with NAND gates...
![]() Circuit diagram gated D latch with NAND gates. |
![]() Circuit symbol gated D latch with NAND gates. |
As a result the behavior of the input E is inversed...
![]() Circuit gated D latch with NAND gates. (Enlarge) |
The input E of a gated D latch with NAND gates is inverted with respect to the gated latch with NOR gates...
In the next experiment, you expand the DE-flip-flop by two inputs.